XDR™2 Memory

Today's XDR™ memory interfaces provide an order of magnitude higher bandwidth than other memory technologies. The XDR2 memory interface represents the next step in high-bandwidth interfaces for graphics, networking, and consumer electronics applications. Using Rambus's patent-pending micro-threading technology, XDR2 interfaces will be able to supply up to five times more usable bandwidth to memory controllers than today's best competing memory technologies. XDR2 DRAM devices are targeting 8.0GHz data rates, enabling a single DRAM device with 16GB/s of peak bandwidth. Micro-threading increases the usable bandwidth by reducing column-access granularity to 16 bytes per device. The result is a traditional 8-bank CMOS DRAM core with the performance of a 16-bank memory device. XDR2 memory interfaces will also use Rambus's proven FlexPhase™ timing circuitry with additional adaptive timing features for a more robust signaling environment at high bandwidth. The XDR2 architecture provides the capability to scale data rates beyond 8.0GHz and will provide chip and system designers with the features they need to achieve the highest performance using the fewest number of controller pins and DRAM devices.

Micro-threading works by partitioning a traditional 8-bank CMOS DRAM core into 16 independently addressable banks. In today's memory devices, a single column access uses resources on both halves of the DRAM. An XDR2 DRAM device, however, accesses only small portions of data per column access, allowing finer access granularity and increased effective bandwidth.