|
|
Download FileFile Name: Modeling and Correlation of Supply Noise for a 3.2GHz Bidirectional Differential Memory BusThis paper describes the modeling of power supply noise in a high-bandwidth XDR™ DRAM memory system and the correlation with measurement results in time domain while the system is operating. A supply network model is presented that allows prediction of worst-case supply noise outside as well as inside the device packages. Comparison of simulation results with measurements outside the package show excellent correlation, verifying the modeling approach. Read more... This document is only available to registered users of Rambus.com. If you're already a Rambus.com user, sign in below. New to Rambus? Register for an account! or Create Account to download. |
|
-
-
- XDR2 World's fastest DRAM technology with performance up to 12.8Gbps
- DDR Digital controllers and physical interfaces for DDR2 and DDR3
- Terabyte Bandwidth Initiative New technologies that will enable 1TB/s memory architectures
- Partner Solutions Digital logic and physical interfaces for PCI Express®, Fibre Channel and other networking interfaces
-
- XDR Award-winning memory architecture shipping in high volume
- Mobile Memory Initiative High-bandwidth, low-power memory for next-generation mobile devices
- Custom Solutions Sophisticated memory and logic designs for challenging system implementations
- RDRAM The first high-performance memory for computing and consumer electronics
-
|