Rambus Design Seminar Taiwan

The Future of High Performance Memory Designs

Thursday, June 26, 2008 | Ambassador Hsinchu | Hsinchu, Taiwan

Rambus Design Seminar Taiwan will explore the future of high-performance memory designs:

  • Types of memory systems required for next generation consumer applications and how these advanced memory systems will solve tomorrow's system challenges
  • Innovative techniques developed by Rambus to improve memory performance and reduce overall system costs
  • Solutions to multi-GHz memory designs
  • Rambus' latest development initiative, the Terabyte Bandwidth Initiative, which enables 1 TB/s of memory bandwidth performance into a single SoC

There is no cost for this seminar, but you must register to attend. Sign up early, as space is limited.

Who should attend?

Anyone who designs or manufactures digital consumer electronic systems or memory subsystems, including:

  • System Designers
  • System Manufacturing Engineers
  • Chip Architects
  • Technical Managers
  • Product Marketing

When?

Thursday, June 26, 2008 at 10:00 A.M.


Where?

Ambassador Hsinchu
188 Chung Hwa Road
Section 2, Hsinchu
Taiwan
www.ambassadorhotel.com.tw


Demonstrations and Q&A

Technical experts from Rambus will conduct demonstrations and answer questions at the end of the main session. Lunch will be provided to all attendees, and Rambus experts will be available during the lunch hour to answer questions.

Agenda

10:00 - 10:30    Registration
 
10:30 - 11:00    Introduction and Rambus Memory Technologies Update
Joseph Lin
Sales Director, Rambus Taiwan/Greater China
 
11:00 - 11:30    XDR™ DRAM Roadmap
Mr. Ken Su
Senior Marketing Manager, BU Specialty DRAM, Qimonda Asia Pacific
 
11:30 - 12:00    Elpida DRAM Solutions to Advanced Digital Consumer Electronic Systems
Mr. Yasuo Yoshitomi
Executive Manager Technical Marketing, Gr. Digital Consumer Division, Elpida Memory Inc.
 
12:00 - 12:45    Terabyte Bandwidth Initiative
Craig Hampel
Rambus Fellow
 
12:45 - 13:45    Lunch and Demonstrations
 
13:45 - 14:20    XDR Memory Architecture for Next Generation Consumer Products
Rob Dhat
Product Marketing Manager, Rambus
 
14:20 - 14:50    XDR Package/PCB Design and Emulation Tools
Nirmal Jain
SMTS Systems Engineer, Rambus
 
14:50 - 15:00    Break
 
15:00 - 15:40    High-speed Memory Test and Measurement
Mr. Ryan Lu
Manager, Agilent-Taiwan
 
15:40 - 16:20    High Frequency Signal Integrity Analysis
Mr. David Yang
Technical Support Manager, Tektronix-Taiwan
 
16:20 - 16:30    Lucky Draw