XDR™2 Video Demonstration



Related Videos

XDR and XDR2 Memory Architecture: Performance and Power-Efficiency Demonstration
Kendra DeBerti runs through a demo of the XDR-XDR2 Memory Architecture, hig

XDR™2 Video Presentation
Capable of data rates of 6.4 to 12.8Gbps, the XDR™2 architecture is t

XDR™ Memory Architecture
The Rambus XDR™ memory architecture achieves an order of magnitude hi

Rambus Contributions to the PlayStation®3
In this video, Mr. Toshiyuki Hiroi of Sony Computer Entertainment and David

Related Files

Micro-threaded Row and Column Operations in a DRAM Core
The technique of micro-threading may be applied to the core of a DRAM to reduce the row and column access granularity. This results in a significant performance benefit for those applications that deal with small data objects. Read more...

Micro-threaded Row and Column Operations in a DRAM Core

XDR™2 Memory Architecture
Today's powerful graphics and multi-core processors require significantly higher memory performance when compared to traditional single-core processors. Without adequate data bandwidth, memory becomes the limiting factor in delivering ...

XDR™2 Memory Architecture

Interested in how Rambus interface technology can help your next design?

Request More Information
Follow us on Twitter!


Bookmark and Share