XDR™2 Video Demonstration
See the demo of a silicon-proven XDR™2 board achieving the industry's

XDR and XDR2 Memory Architecture: Performance and Power-Efficiency Demonstration
Kendra DeBerti runs through a demo of the XDR-XDR2 Memory Architecture, hig

Terabyte Bandwidth Initiative
The Rambus Terabyte Bandwidth Initiative pioneers new memory signaling tech

Beyond DDR3: Advancing the Main Memory Roadmap
Rambus innovations can provide the power efficiency and performance needed

Micro-threaded Row and Column Operations in a DRAM Core
The technique of micro-threading may be applied to the core of a DRAM to reduce the row and column access granularity. This results in a significant performance benefit for those applications that deal with small data objects. Read more...

XDR™2 Memory Architecture
Today's powerful graphics and multi-core processors require significantly higher memory performance when compared to traditional single-core processors. Without adequate data bandwidth, memory becomes the limiting factor in delivering ...